Recently, reduction in size and weight of electronic devices and their high functionality have been rapidly improved. Size reduction and higher level of integration of semiconductor integrated circuits used in such electronic devices have also been improved. For this reason, there is a dilemma in that, though the number of wiring pins of an integrated circuit is more increased compared to that of a conventional semiconductor package, a mounting area and a package area are decreased. Under such circumstances, packaging methods having a high package density, such as BGA (Ball Grid Array) method and CSP (Chip Scale Package) method, which are different from conventional package methods, have been proposed.
In these semiconductor package methods, instead of a lead frame used for conventional semiconductor packages, a wiring board for mounting a semiconductor chip, which is constituted by various materials such as plastics and ceramics (e.g., a substrate and an interposer), is used, and thereby an electrode of a semiconductor chip and a wiring board are electrically connected. A circuit constituted on the wiring board for mounting the semiconductor chip is introduced into an electronic device that is reduced in size and thickness and is highly densified. Therefore, compared to general wiring boards, the wiring board is much thinner, and its wiring is significantly advanced in terms of thinning and density growth. In such a package method, when an electrode of a semiconductor chip and a wiring board are electrically connected, fine wires are connected to them under high-temperature atmosphere by means of solder reflow or the like. The fine wiring must be protected. As a protective layer therefor, solder resist materials having various resin compositions have been developed.
In general, a pore portion for mounting a semiconductor chip, an electronic part or the like is formed in a solder resist. For example, a pore portion of a solder resist is laminated with a photomask in which a pattern is formed, and it is subjected to exposure according to the photographic method and subsequently subjected to image development using a developer such as sodium carbonate, sodium hydroxide and tetramethyl ammonium hydride (TMAH) to form a pore portion. However, as electronic devices are further reduced in size and thickness, miniaturization of wiring is further accelerated. For this reason, the ratio of a solder resist layer with respect to the thickness of a wiring board tends to be increased. Therefore, since a solder resist in which a pore portion is formed by exposure/development has a low glass transition temperature, a low elastic modulus and a high coefficient of thermal expansion, a solder resist material having physical properties, which are more similar to those of an insulation layer of a wiring board, is desired.
When using the photographic method, it is difficult to form a fine pore portion due to influence of scattered light, and for this reason, attention has been given to methods of opening a pore by means of laser irradiation (for example, see Japanese Laid-Open Patent Publication No. 2003-101244 (Patent Document 1)). However, when using a conventional photosensitive resin for a solder resist in which a pore is opened by means of laser irradiation, since a thermosetting resin such as epoxy resin is used as the photosensitive resin, accuracy of opening a pore by means of laser irradiation may be low depending on a resin composition thereof. In addition, since a temperature of solder reflow is increased in the mounting process as a solder becomes lead-free, a crack may be generated at the time of heating particularly in the case of using a thin wiring board.